This invention relates to transmission of digital information over an analog medium in tandem with a digital network and, more particularly, this invention relates to high-speed modems.
U.S. Pat No. 4,924,492, issued May 8, 1990, describes a number of approaches for transmitting digital information over an analog transmission medium. To summarize, it describes a number of techniques for combining bits in a signal stream into digital words, converting those words into symbols, associating an analog signal with each symbol, and combining the analog signals to form a contiguous signal that is transmitted over an analog transmission medium. For example, with 3-bit coding, which corresponds to 8 levels and a symbol rate of 160,000 symbols per second, a PAM baseband signal of 80 kHz bandwidth can provide passage to a digital signal of 480 kb/s rate.
In connection with the T1 carrier system and an associated D channel bank (such as the D4 channel bank system offered by ATandT), voiceband channels are digitized and multiplexed to form a single 1.544 Mb/s stream. Specifically, each 3.5 kHz channel is sampled with an 8 kHz clock, and each sample is resolved into one of 256 levels that are represented by 8 bits, resulting in a 64 kb/s rate. Twenty four such channels of 64 kb/s each are combined with framing and other control bits to form a 1.544 Mb/s stream.
In the modem art where signals are restricted to voiceband channels, it has generally been accepted that the channel capacity is in the range of 30 kb/s, assuming a nominal bandwidth of between 3 to 3.5 kHz and a signal-to-noise ratio of about 30 dB. This is based on Shannon""s classical work.
In the past 40 years, much progress has been made toward achieving modem data rates that approach this capacity. For example, 19.2 kb/s transmission is now possible over such voiceband channels.
On first blush it may appear that 19.2 kb/s is already close enough to the Shannon limit that sizeable improvement over this number would be very difficult to achieve. Doubling this amount would be practicably out of the question. Yet, the D channel bank provides a capacity that nominally is 64 kb/s. (Actually the capacity is not quite 64 kb/s because some capacity is allocated to signaling and line coding restrictions.)
To state the obvious, 64 kb/s communication over a subscriber line that has not been limited to 3.5 kHz band is doable, as demonstrated, for example, in the aforementioned U.S. patent. The need, however, is not merely to transmit at or near 64 kb/s but, to do so in a voiceband channel in a manner that allows coupling of the developed signal to the D channel bank. Stated in other words, there is a need for a modem whose analog output can be fashioned so well that the D/A converter in the modem and the A/D converter in the channel bank contribute no degradation.
Disclosed is a modem that operates reliably at a symbol rate (e.g., 7 kHz) that corresponds to twice the channel bandwidth even when it is coupled to a receiving A/D converter that operates under control of a clock that operates at a faster rate than this symbol rate (e.g., at 8 kHz). This modem is realized by synchronizing the modem""s operation to the A/D""s clock. The modem""s output is conditioned by adjusting it to the A/D converter""s sampling times and slicing levels so that the quantization noise problem existent in conventional arrangements is avoided. To do this properly, the intersymbol interference should also be minimized.
The intersymbol interference is minimized in one embodiment by forming the modem""s output from a collection of analog samples that have a zero value at all but predefined sampling instances of the A/D""s sampling clock. In another embodiment the signal created at the modem is preconditioned to take account of the intersymbol interference.
When the A/D""s clock is higher than twice the bandwidth of the modem""s output signal, some intersymbol interference cannot be avoided. However, in accordance with the principles of this invention, the position and value of this interference is computed at the receiver and subtracted from the received signal.
The synchronizing of the modem""s operation to the receiving A/D""s clock is accomplished in a number of steps. First, the receiving A/D converter""s clock is detected, then its phase is ascertained, thereafter the A/D converter""s slicing levels are ascertained, and finally the transmission medium""s transfer characteristics are equalized.